IFIP Working Group 10.5 Minutes Meeting
Dresden, 13/03/2012 (18:30 - 20:45)
DATE Conference room 5
Preliminary version
Notes taken by Lionel Torres and Dominique Borrione

Attendees : David Atienza, Jose L. Ayala, Juergen Becker, Achim Bettberg (invited), Dominique Borrione, Kiyoung Choi, Luc Claesen, Ayse Coskun, Nikil Dutt, Michael Hübner, Ahmed Jerraya, Takashi Kambe, Wolfgang Nebel, Franz J. Rammig, Ricardo Reis, Sergey Rosanov (representing Alexander Stenkovsky), Donatella Sciuto, Leandro Soares Indrusiak, Lionel Torres, Chi-Ying Tsui, H. Fatih Ugurdad, Eugenio Villar.

Participation by skype : Salvador Mir, Luis Miguel Silveira.

Apologies : Einar J. Aas, Matthew R. Guthaus, Reiner Hartenstein, Masaharu Imai, Klaus Mueller-Glaser, Osamu Karatsu, Ian O'Connor, Hillel Ofek, Adam Pawlak, Flávio Rech Wagner, Michel Robert, Wolfgang Rosenstiel, P.A. Subrahmanyam, Ronald Waxman.

The minutes are complemented by several slide presentations used during the meeting, which are attached as a separate documents. Contents of the slide presentations are not necessarily repeated in the minutes.

1- Welcome of Participants, Approval of Agenda

2- Minutes Hong Kong meeting

Minutes of Hong Kong are approved by all the attendees

3-Introduction of new members

New members introduced themselves and were welcome to the WG by applause:

Ayse K. Coskun, Boston University,
Research topic: Performance and Energy aware computing laboratory -
Key words : 3D, Thermal modelling, Dynamic Management, Novel Architecture, Green Software (Virtualisation and Scheduling), many core - http://www.bu.edu/peac-lab

Leandro Indrusiak, York University. (see attached presentation)
Key words: Model Driven design of Embedded systems, Real time systems, Energy aware computing, Transaction level simulation for NoC and MPSoC

Takashi Kambe, Univ. OSAKA, Japan. (see attached presentation)
Key words: automatic layout, VLSI Circuits, System level design, CAD

Michael Huebner, KIT, Germany.
Key words: processor and reconfigurable HW, HW/SW partitioning, application specific processor, CAD tool/Design flow for reconfigurable, Dynamic reconfiguration

4- Update on FDL 2012 by Dominique Borrione

Call for paper is out and was distributed by e-mail.
Paper submission deadline is April 1st.

Paper work for IFIP WG 10.5 co-sponsorship without financial involvement is being done. IFIP logo will be added immediately after.
Please promote this event: http://www.ecsi.org/fdl

5- Update on VLSI-SoC 2012 by Ayse K. Coskun using presentation prepared by Matthew Guthaus (see attached .ppt document)

Two sessions in parallel, TPC is set up, PhD Forum is planned.
12 Tracks, Ayse will communicate the TPC member list to the working group. and/or to The Web site is to be updated with the TPC member list.
The presentation done shows clearly that the conference organization is well advanced.

Please promote VLSI 2012, http://vlsisoc2012.soe.ucsc.edu/

6- Update on VLSI-SoC 2013 by Fatih Ugurdag (see attached .ppt document)

Istanbul, Turkey
Dates: still to be finalized. Will try to avoid overlap with ES Week if their dates can be obtained quickly.
General Chair: Fatih Ugurdag, Ozyegin University, Istanbul, Turkey
General Co-Chair: Luis Miguel Silveira, INESC ID/IST, PT
Program Co-Chairs: Alex Orailoglu, UC San Diego, US
              Luigi Carro, UFRGS, Brasil

Hotel: Several candidate hotels (under discussion/negotiation) See details and location on slides. First choice of Fatih Ugurdag: Novotel near the sea. WG approves.

Local organization team is set up (see slides).
Budget is shown (see in slide link). Participation of 150 would be beneficial.

Paper work with IFIP, and MOU with IEEE.
The University has expanded their insurance to cover the IEEE request for liability insurance amount.
The only unacceptable item in the IEEE MOU for Ozyegin University: to refer to the court of New York in case of disagreement. It is suggested to remove the paragraph and submit it to IEEE as such.

New: IFIP is changing from paper to electronic submission of event approval forms.
Please refer to e-mail being forwarded by Dominique on this topic just after these minutes.

7- VLSI-SOC 2014

There is a proposal from Virendra Singh to organize VLSI-SOC 2014 in India, Mumbai (Bombay). Dominique reads some indications received by e-mail. The venue would be at the University premises. In the discussion about the India proposal, the following pros and cons were raised:

For lack of information, the proposal will need to be presented in more details for possible approval at the October meeting in Santa-Cruz.

Post meeting information: Virendra Singh sent slides the day after the meeting.
They are attached as appendix to these minutes for the WG inspection.

Ricardo Reis also mentions another proposal to have VLSI-SOC in Mexico. No details were provided.

8- Miscellaneous

Next meetings

San Francisco, June 2012, in conjunction with DAC
Santa Cruz, October 2012, in conjunction with VLSI-SOC
Grenoble, March 2013, in conjunction with DATE

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